At present, microprocessors can have one of two memory connection architectures. In the first architecture, known as the Von Neumann architecture, the microprocessor is connected to the memories as a whole through a single address and data bus. As a consequence, the microprocessor can only access, at a given time, one data element or one instruction code.
To speed up program execution, a second so-called Harvard architecture was developed, in which the microprocessor could simultaneously access an instruction code and a data element, which are accordingly stored within different memories. The Harvard architecture requires the provision of a microprocessor having two different buses, one of which is dedicated to program access and is connected to the memory including the program, and the other is dedicated to data access and is connected to the data memory.
In this manner, the microprocessor may read an instruction from the program memory and perform a read or write operation from/to the data memory during the same clock cycle. As the result, a Harvard architecture microprocessor needs fewer clock cycles for executing a program than a Von Neumann architecture microprocessor. However, the Harvard architecture has some drawbacks, in particular, in terms of the flexibility of using memories connected to the microprocessor.
Specifically, this architecture requires storing, within predefined and separate respective memory areas, program instructions and non-modifiable data, including operational parameters or parameters that have to be stored in a non-volatile manner. The Harvard architecture cannot be used in a microprocessor connected to only one non-volatile memory and one volatile memory. Moreover, the Harvard architecture does not allow program instructions to be stored within the volatile memory, for example, for test purposes. Also, the Harvard architecture does not allow a program to modify itself by writing executable instruction codes as data into a memory.